dissent1:

Try adding lines 116-134 from here https://git.lede-project.org/?p=source.git;a=blob;f=target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts;h=4edfbeb72db42f7a91eee00ab8ad10a97be90721;hb=HEAD

into r7500 Dts.

reiffert:

I tried and nothing changed.

dissent1:

Has it been ever working?

reiffert:

Using Netgear Stock Software on linux-3.4.103 it's working just fine.

dissent1:

I mean in lede, half a year ago maybe

reiffert:

These issues are known to occurr since Netgear R7500 ipq806x made it into lede, check out the comments here https://lists.openwrt.org/pipermail/openwrt-devel/2015-August/035335.html

reiffert:

Please find the register dumps taken from /sys/kernel/debug/dwc3/regdump and the diffs as follows.

@debian:~$ diff -u regdump.linux-3.4.103.dwc3.0 regdump.linux-3.4.103.dwc3.1
--- regdump.linux-3.4.103.dwc3.0 2017-02-17 22:59:59.396064293 +0100
+++ regdump.linux-3.4.103.dwc3.1 2017-02-17 23:00:20.588064937 +0100
@@ -170,9 +170,9 @@
DALEPENA = 0x00000000
DEPCMDPAR2(0) = 0x00000000
DEPCMDPAR2(1) = 0x00000000
-DEPCMDPAR2(2) = 0x4ba9e000
+DEPCMDPAR2(2) = 0x4ba09000
DEPCMDPAR2(3) = 0x00000000
-DEPCMDPAR2(4) = 0x4baa0000
+DEPCMDPAR2(4) = 0x4ba0b000
DEPCMDPAR2(5) = 0x00000000
DEPCMDPAR2(6) = 0x00000000
DEPCMDPAR2(7) = 0x00000000
@@ -232,11 +232,11 @@
DEPCMDPAR1(29) = 0x00000000
DEPCMDPAR1(30) = 0x00000000
DEPCMDPAR1(31) = 0x00000000
-DEPCMDPAR0(0) = 0x4ba9f001
+DEPCMDPAR0(0) = 0x4b9d2001
DEPCMDPAR0(1) = 0x00000000
DEPCMDPAR0(2) = 0x00000040
DEPCMDPAR0(3) = 0x00000000
-DEPCMDPAR0(4) = 0x4ba9f400
+DEPCMDPAR0(4) = 0x4b9d2400
DEPCMDPAR0(5) = 0x00000000
DEPCMDPAR0(6) = 0x00000000
DEPCMDPAR0(7) = 0x00000000


@debian:~$ diff -u regdump.linux-4.4.47.dwc3.0 regdump.linux-4.4.47.dwc3.1
--- regdump.linux-4.4.47.dwc3.0 2017-02-17 23:04:24.548072345 +0100
+++ regdump.linux-4.4.47.dwc3.1 2017-02-17 23:04:18.924072174 +0100
@@ -4,7 +4,7 @@
GRXTHRCFG = 0x00000000
GCTL = 0x00101401
GEVTEN = 0x00000000
-GSTS = 0x3e800022
+GSTS = 0x3e800002
GSNPSID = 0x5533230a
GGPIO = 0x00000000
GUID = 0x0004042f
@@ -163,15 +163,15 @@
DCFG = 0x00080804
DCTL = 0x00000000
DEVTEN = 0x00000000
-DSTS = 0x00560004
+DSTS = 0x00d60014
DGCMDPAR = 0x00000000
DGCMD = 0x00000000
DALEPENA = 0x00000000
DEPCMDPAR2(0) = 0x00000000
DEPCMDPAR2(1) = 0x00000000
-DEPCMDPAR2(2) = 0x4ecdc000
+DEPCMDPAR2(2) = 0x4ed21000
DEPCMDPAR2(3) = 0x00000000
-DEPCMDPAR2(4) = 0x4ecf1000
+DEPCMDPAR2(4) = 0x4ed0d000
DEPCMDPAR2(5) = 0x00000000
DEPCMDPAR2(6) = 0x00000000
DEPCMDPAR2(7) = 0x00000000
@@ -231,11 +231,11 @@
DEPCMDPAR1(29) = 0x00000000
DEPCMDPAR1(30) = 0x00000000
DEPCMDPAR1(31) = 0x00000000
-DEPCMDPAR0(0) = 0x4ecd7001
+DEPCMDPAR0(0) = 0x4ed20001
DEPCMDPAR0(1) = 0x00000000
DEPCMDPAR0(2) = 0x00000040
DEPCMDPAR0(3) = 0x00000000
-DEPCMDPAR0(4) = 0x4ecf2000
+DEPCMDPAR0(4) = 0x4ed0c000
DEPCMDPAR0(5) = 0x00000000
DEPCMDPAR0(6) = 0x00000000
DEPCMDPAR0(7) = 0x00000000
@@ -297,6 +297,6 @@
DEPCMD(31) = 0x00000000
OCFG = 0x00000000
OCTL = 0x00000040
-OEVT = 0x80000000
+OEVT = 0x00000000
OEVTEN = 0x00000000
-OSTS = 0x00000019
+OSTS = 0x0000000e


OEVT set to 0x00000000 and OSTS set to 0x0000000e: it works
OEVT set to 0x80000000 and OSTS set to 0x00000019: it does not work.

I tried setting the two registers to 0x0 and 0x0e but had no luck. Someone suggested that these registers are read only and might indicate that something is in a hung state OR needs to finish is initialization. E.g. the PCIe. Needs to be investigated at a later point in time.

reiffert:

Add to arch/arm/boot/dts/qcom-ipq8064.dtsi:

usbtypesel: pinmux@1a4000b0 {
compatible = "pinctrl-single";
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x03>; /* only allow to set the rightmost 2 bits */
reg = <0x1a4000b0 0x04>;
};


Add to arch/arm/boot/dts/qcom-ipq8064-r7500.dts:

                    board_pins: pinmux_board_pins {
                            pinctrl-single,pins = <
                                    0x00 0x03 /* IPQ_TCSR_USB_CONTROLLER_TYPE_SEL */
                            >;
                    };
            };

After booting you would notice:

root@LEDE:/# dmesg | grep single
[ 0.234698] pinctrl-single 1a4000b0.pinmux: allocating 1 pins
[ 0.234722] pinctrl-single 1a4000b0.pinmux: try to register 1 pins ...
[ 0.234735] pinctrl core: registered pin 0 (1a4000b0.0) on pinctrl-single
[ 0.234807] pinctrl-single 1a4000b0.pinmux: found group selector 0 for pinmux_board_pins
[ 0.234827] pinctrl-single 1a4000b0.pinmux: request pin 0 (1a4000b0.0) for 1a4000b0.pinmux
[ 0.234841] pinctrl-single 1a4000b0.pinmux: enabling pinmux_board_pins function0
[ 0.234856] pinctrl-single 1a4000b0.pinmux: failed to lookup the sleep state
[ 0.234946] pinctrl-single 1a4000b0.pinmux: 1 pins at pa cea6e0b0 size 4

root@LEDE:/# [ 36.259557] usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd


And that's a working primary USB port!

Just so you know, the following can be found in the .dtsi file, however there is no code in phy-qcom-dwc3.c nor dwc3-of-simple.c which would handle it. I wonder why it was added to the .dtsi file while there is no code handling it. You are safe to remove all occurrences of it.

syscon-tcsr = <&tcsr 0xb0 1>;

FYI, IPQ_TCSR_USB_CONTROLLER_TYPE_SEL was taken from the Netgear GPL. 0xb0 and 0x03 is coming from there too.

The above is an attempt to "writel(0x03, 0x1a400000 + 0xb0);" using the devicetree bindings without changing the kernel source code. If anyone knows a smarter way of how to do that .. feel free to add a comment.

Let me know if anyone else is able to reproduce this and I will work on a patch.

reiffert:

http://patchwork.ozlabs.org/patch/743409/ fixes it in combination with c2d50bd